In many electronic systems there is a need to know the phase difference (or time difference) between two high-speed clock signals of nominally equal frequency within the system. These signals are generally clock signals, but can also be data signals. This need applies to signals within a single device, or signals on a circuit board between multiple devices.
It is very common in a circuit design for registers to be driven using different clock inputs. Moreover, it is commonplace that an integrated circuit or an electronic system operates using multiple clock signals, where the clock signals are operating at nominally equal frequencies. Knowledge about the phase or time relationship between the clock signals is useful information for the user. Current schemes for determining this relationship require counters that operate at frequencies much higher than the signals being measured. These counters start when one signal occurs, and stop when another signal occurs, the count then being representative of the time difference between the two signals. Such schemes are limited to lower frequency applications due to the difficulty in designing counters that can operate much faster than the high frequency signals being measured. In addition, the current methodology may be intrusive, such that the device is not able to operate while the determination of the timing or phase relationship is made.
It is in this context that embodiments of the invention arise.